MCP-1600
Description
    
| 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | (bit position) | 
| Register file  | ||||||||||||||||
| R3 | R2 | |||||||||||||||
| R5 | R4 | |||||||||||||||
| R7 | R6 | |||||||||||||||
| R9 | R8 | |||||||||||||||
| RB | RA | |||||||||||||||
| RD/GD | RC/GC | |||||||||||||||
| RF/GF | RE/GE | |||||||||||||||
| GB | GA | |||||||||||||||
| G9 | G8 | |||||||||||||||
| G7 | G6 | |||||||||||||||
| G5 | G4 | |||||||||||||||
| G3 | G2 | |||||||||||||||
| G1 | G0 | |||||||||||||||
| Control registers  | ||||||||||||||||
| LC | Location Counter | |||||||||||||||
| RR | Return Register | |||||||||||||||
| TR1 | TR0 | Translation Register | ||||||||||||||
| Status register | ||||||||||||||||
| NB | ZB | C4 | C8 | N | Z | V | C | ALU status/Flags | ||||||||
The MCP-1600 is a multi-chip microprocessor introduced by Western Digital in 1975 and produced through the early 1980s.[1][2] Used in the Pascal MicroEngine, the WD16 processor in the Alpha Microsystems AM-100, and the DEC LSI-11 microcomputer, a cost-reduced and compact implementation of the DEC PDP-11.
There are three types of chips in the chip-set:
- CP1611 RALU - Register ALU chip
 - CP1621 CON - Control chip
 - CP1631 MICROM - Mask-programmed microcode ROM chip (512 – 22 bit words)
 
The chips use a 3.3MHz four phase clock and three power supply voltages (+5V, +12V, and -5V), as required by the N-channel silicon gate process then available at Western Digital. Internally the MCP-1600 was a (relatively fast) 8-bit processor that can be micro-programmed to emulate a 16-bit CPU. Up to four MICROMs are supported, but usually two or three could hold the needed microprogram for a processor. [3]
The most significant feature of the MCP-1600 is its Programmable Translation Array (PTA). The PTA serves to generate new microinstruction fetch addresses as a function of several parameters. These parameters are those which are normally considered during the decode of a macroinstruction. The PTA was designed specifically to eliminate most of the overhead of macroinstruction translation. Essentially a macroinstruction opcode is quickly translated into an address that is loaded onto the Location Counter, creating a jump to the appropriate microcode to handle the macroinsintruction.[3]
John Wallace was the Project Manager and designed the 1621, Mike Briner designed the 1611, and later became a Senior VP at Silicon Storage Technology. Bill Pohlman was the design engineering manager and he later was Project Manager for the Intel 8086 processor.
A clone of the CP1611 and CP1621 was manufactured in the Soviet Union under the designation KR581IK1 and KR581IK2 (Russian: КР581ИК1 and КР581ИК2).[4] The Soviet 581 series included other members of the MCP-1600 family as well.[5]
Gallery
    
- Die photos from LSI-11 chip set
 
CP1611 RALU chip
CP1621 Control chip
CP1631 MICROM chip
References
    
- "Western Digital adds MCP-1600 Micro". Computerworld. 26 November 1975.
 - "Western Digital 1600". AntiqueTech. Archived from the original on 3 January 2017. Retrieved 5 January 2017.
 - MCP-1600 Microprocessor Users Manual (PDF). Western Digital. 1975. Retrieved 28 April 2022.
 - "Soviet microprocessors, microcontrollers, FPU chips and their western analogs". CPU-world. Retrieved 2020-04-18.
 - Козак, Виктор Романович (24 May 2014). "Номенклатура интегральных микросхем — Микропроцессоры: серии 580 - 589" [Nomenclature of integrated circuits — Microprocessors: Series 580 - 589] (in Russian). Retrieved 24 March 2016.